Lattice iCE40HX1K FPGA

[`FRANK.C]

I did a little more trimming and I got the usage of LUTs down to 740. After running placer and router this rises to 842.

The development board in post 7 is of no use. As the FPGA used in it is the iCE40HX1K-VQ100 version which doesn't contain a PLL.
The only development board that is in stock which uses the iCE40HX1K-TQ144 is the ICE40HX1K-STICK-EVN.

Frank

[ppppenguin]

Using FPGAs that are only just about big enough is a route to madness. Been there, done that, got several t-shirts. Even if the logic will nominally fit in the device, the place and route often struggles as the device gets more than about 80% full. If the speed constraints are tight (probably not true for a 625>405 converter in a modern FPGA) then timing closure turns into a nightmare. I can't imagine that these problems are unique to XIlinx FPGAs.

The time to possibly move to a smaller device is after you've done the development. Until then you're prone to the "oh ****, how do I get that extra bit of functionality into the chip". Again been there, done....... Too often.

[`FRANK.C]

Hi Jeffery
It is getting tight in there.
There are 8 pins that can be used as an input to the PLL. At the beginning all 8 were available but now I can only use 2 of them otherwise it wont fit.
A sign it is getting congested in there.

None of the available iCE40HX1k development boards suited my needs so I have decided to try and build a development board.
I have ordered a PCB from PCBWay and it is making its way to me. I should have received it 3 or 4 days ago but it decided to take the scenic route.
It is currently taking a tour of the USA. I contacted DHL to find out why it is in the USA and not Ireland.
I got this reply "I have just tracked your shipment  due to a back log in Hong Kong All our shipments are being re routed."

While waiting for the PCB I tested the VHDL files in a Hedghog to make sure they are working OK.
At least this removes one unknown when I come to put it all together.

Frank

[`FRANK.C]

The PCBs arrived and I got one built.
I can programme the FPGA but the Flash memory wont programme for me. I will have to spend some time later to find out what the problem is.
The chips that can be seen on the bottom side of it are PIC, FPGA, Video decoder and Video amp.
       

When first tried. I used the files I tested in the Hedghog they included the inferred memories, 2 line interpolater and 4 X oversampling on the output.
When tested in the Hedghog they worked fine without using any constraints.

To reduce the logic to a minimum I didn't use an interpolator and just used line dropping. I also removed the 4 X oversampling.
The resultant conversion was full of glitches and there was line jitter at approximately 2 Hz.

Constraining the clocks and reducing the the clock for the DTO that produces the video output clock from 218 MHz to 108 MHz cured the line jitter.
The glitches were also reduced but some still remained.
       
Constraining another 9 MHZ  clock that I had missed gave a clean conversion.
The picture of the test card below is of it working.
I am using a PSC as a signal source. It is a 2 line converter with 4 X oversampling on the output. With no options not even equalising pulses.
The line delay and time redistribution memories are inferred. There is a wizard that should build them but it just wont save the built files for me.
   
Frank

[Freya]

Would the Y1 crystal on the PIC not need a 100k across ?

[`FRANK.C]

Hi Stephen
I think some ceramic resonators can benefit from a parallel resistor but I don't think it necessary in this case with a crystal.
The crystal in question is 15 MHz to provide a 15 MHz clock in case I wanted to generate a test card within the PIC and pass it to the FPGA.
I think it unlikely that I will do that in which case the crystal will be removed and I will use the internal oscillator in the PIC. AS anything else the PIC will be doing doesn't require an accurate clock.

Frank

[Murphyv310]

Interesting work Frank
Possibly a cheaper way of standards conversation?

[`FRANK.C]

Hi Trevor
Unfortunately not.
I don't think the cost to build would be very different from a Hedghog.

The thing is the FPGA's needed to build a Hedghog are like hens teeth now.
This build is just using what is currently available.

It is not a FPGA I would choose But as far as I can see it is the largest that is available in quantity.
Mouser have over 5000  iCE40HX1K-TQ144 in stock and Digikey have over 3500 in stock.
I am also hoping that because it is relatively small FPGA and stocks are high at the moment that it will stay in stock.
There are larger FPGA's in the iCE40 range that would be more suitable but there stocks are very low.
So it is just a case of trying to make the best of what is out there now.

Frank

[ppppenguin]

At least you can choose a different FPGA, even if it isn't ideal.

What's the availability of the modulator chips now? There's no alternative part and I thought we were down to the floor sweepings.

[ppppenguin]

RS have this part which is twice the size and may be pin compatible: https://uk.rs-online.com/web/p/fpgas/1684222

Looking at Mouser, who have a huge range of FPGAs listed, all the low cost ones seem to be Lattice (respectable 2nd tier) or Gowin (never heard of them). Seems like Altera and Xilinx have abandoned the low end market, certainly for low volume users. Possibly to do with takeovers by AMD and Intel.