23-08-2019, 08:56 PM
Made some progress. I got the interpolater finished it is a 2 line interpolater using 3 line stores of two port RAM. 2 lines are read from while the third is written to. They are rotated at each 405 line. You could probably get away with 2 line stores but the FPGA has plenty of memory and 3 makes it easier to manage.
The decoder was producing the H sync too late on each line which had the effect of cropping the beginning of the lines.
Adjusting the H sync position and the AVID start and stop positions in the decoder resolved that.
The decoder has a 9 bit ADC at its input but the is no way I can find to access the 9 th bit.
I am using a colour monitor to view the output it has a good sharp image but is not at all photogenic. Any photo I took of it came out pretty awful with a lot of pattering on it.
Picture below of the 625 output of the converter is off a TV
Frank
The decoder was producing the H sync too late on each line which had the effect of cropping the beginning of the lines.
Adjusting the H sync position and the AVID start and stop positions in the decoder resolved that.
The decoder has a 9 bit ADC at its input but the is no way I can find to access the 9 th bit.
I am using a colour monitor to view the output it has a good sharp image but is not at all photogenic. Any photo I took of it came out pretty awful with a lot of pattering on it.
Picture below of the 625 output of the converter is off a TV
Frank
