16-08-2019, 10:54 AM
(This post was last modified: 16-08-2019, 11:05 AM by ppppenguin.)
I can only speak for the SAA7118 PAL/NTSC decoder and macrovision. It tolerates and detects macrovision. In the products I designed we ignored macrovision.
The LM1181 shouldn't mind macrovision.
I once designed a Sound-in-Sync stripper. In other words get rid of SiS from a video signal. I don't have the circuit immediately to hand but ISTR the sync separator was a bit special. It had to find the leading edge of sync and then ignore everything else until the trailing edge.
Photo shows latest results. H timing was correctable in the SAA7118, just trim the appropriate register settings. Interpolation is still horrible as you can see.
Just realised I might need to play with brightness and contrast. It's not miles out but I was originally using the SAA7118 in its 656 (601 with digital sysncs) mode. Assuming the picture to sync ratio on the input was correct this made the brightness and contrast correct by design. But now I'm taking raw ADC output and haven't yet established the black and white levels. I think black is at 60h from my sync separator experiments. What I won't have is the SAA7118's built-in contrast and brightness controls. Correcting black level is easy, just an adder. There may be facility to tweak the AGC on the ADC. If not it means a multiplier which is a lot of logic in this FPGA. Perhaps not too bad as one input should be a constant which can massively reduce the logic required. Might be able to do it in a BRAM (block RAM) as I actually have some to spare. They're normally a precious resource but I'm only using 7 out of the 14 available. In virtually every FPGA deisgn I've ever done BRAM has been a problem.
PS: Bunged PLUGE through the system. Black is 130mV above blanking and black to white is only 470mV. The ADC isn't using a lot of its dynamic range. The digital levels are about 58 for black and 203 for white. The 601 standard is 16 for black, 235 for white.
The LM1181 shouldn't mind macrovision.
I once designed a Sound-in-Sync stripper. In other words get rid of SiS from a video signal. I don't have the circuit immediately to hand but ISTR the sync separator was a bit special. It had to find the leading edge of sync and then ignore everything else until the trailing edge.
Photo shows latest results. H timing was correctable in the SAA7118, just trim the appropriate register settings. Interpolation is still horrible as you can see.
Just realised I might need to play with brightness and contrast. It's not miles out but I was originally using the SAA7118 in its 656 (601 with digital sysncs) mode. Assuming the picture to sync ratio on the input was correct this made the brightness and contrast correct by design. But now I'm taking raw ADC output and haven't yet established the black and white levels. I think black is at 60h from my sync separator experiments. What I won't have is the SAA7118's built-in contrast and brightness controls. Correcting black level is easy, just an adder. There may be facility to tweak the AGC on the ADC. If not it means a multiplier which is a lot of logic in this FPGA. Perhaps not too bad as one input should be a constant which can massively reduce the logic required. Might be able to do it in a BRAM (block RAM) as I actually have some to spare. They're normally a precious resource but I'm only using 7 out of the 14 available. In virtually every FPGA deisgn I've ever done BRAM has been a problem.
PS: Bunged PLUGE through the system. Black is 130mV above blanking and black to white is only 470mV. The ADC isn't using a lot of its dynamic range. The digital levels are about 58 for black and 203 for white. The 601 standard is 16 for black, 235 for white.
www.borinsky.co.uk Jeffrey Borinsky www.becg.tv
