14-08-2019, 10:12 PM
Hi Jeffrey
Great stuff!
It's interesting that you can get the raw ADC data from the decoder and where that might lead.
I have started on a new path. I have another board ( the one I did the modulator experiments with) and when I made it I fitted two AL422 framestores as I had them left over from the earlier stages of Hedghog.
Initially I had discounted using this board because it has only one pin that the PLL's in the FPGA can be accessed with. A 50MHz oscillator was originally using this pin and I removed it and connected the decoders video clock to it. But now I needed the 50 MHz oscillator to derive the 9.264706 MHz clock for the decoder. Then I realised that the video clock wont be connected to a PLL so any pin will do for it.
I have refitted the 50 MHz oscillator to the development board and connected the video clock to another pin. I have removed the 14.31818 MHz crystal and load capacitors from the decoder. Connected the decoder Osc. pin to a FPGA pin. I have the LM1881 mounted on a bit of veroboard. Just have to start writing the VHDL.
With the AL422 I will need some dual port memory to do the interpolation. There is plenty in the FPGA.
Frank
Great stuff!
It's interesting that you can get the raw ADC data from the decoder and where that might lead.
I have started on a new path. I have another board ( the one I did the modulator experiments with) and when I made it I fitted two AL422 framestores as I had them left over from the earlier stages of Hedghog.
Initially I had discounted using this board because it has only one pin that the PLL's in the FPGA can be accessed with. A 50MHz oscillator was originally using this pin and I removed it and connected the decoders video clock to it. But now I needed the 50 MHz oscillator to derive the 9.264706 MHz clock for the decoder. Then I realised that the video clock wont be connected to a PLL so any pin will do for it.
I have refitted the 50 MHz oscillator to the development board and connected the video clock to another pin. I have removed the 14.31818 MHz crystal and load capacitors from the decoder. Connected the decoder Osc. pin to a FPGA pin. I have the LM1881 mounted on a bit of veroboard. Just have to start writing the VHDL.
With the AL422 I will need some dual port memory to do the interpolation. There is plenty in the FPGA.
Frank
