22-10-2019, 07:38 PM
Thanks Jeffrey
The test card in the modulator looks similar to the one in Hedghog but there is a big difference in writing them.
The test card in the modulator is wrote in assembler as one file and is over 4000 lines.
The number of instruction cycles between every video transition must be calculated and counted. A mistake in calculating or counting results as an on screen defect.
The pixel frequency was chosen to make 1/1.5/1.875/2.5/3 MHz gratings possible.
The Hedghog test card is wrote in VHDL and is under 400 lines.
No need to count the counters in the FPGA does all that for you.
Practically any frequency grating within the 3 MHz bandwidth is possible. I do remember having to slightly adjust the gating frequency's to remove some shading from them. Maybe caused by the jitter from the DTO.
Frank
The test card in the modulator looks similar to the one in Hedghog but there is a big difference in writing them.
The test card in the modulator is wrote in assembler as one file and is over 4000 lines.
The number of instruction cycles between every video transition must be calculated and counted. A mistake in calculating or counting results as an on screen defect.
The pixel frequency was chosen to make 1/1.5/1.875/2.5/3 MHz gratings possible.
The Hedghog test card is wrote in VHDL and is under 400 lines.
No need to count the counters in the FPGA does all that for you.
Practically any frequency grating within the 3 MHz bandwidth is possible. I do remember having to slightly adjust the gating frequency's to remove some shading from them. Maybe caused by the jitter from the DTO.
Frank
