05-11-2018, 08:55 AM
(This post was last modified: 05-11-2018, 09:00 AM by ppppenguin.)
The vision modulator isn't too complex in theory.
Use a high frequency clock that's a multiple of the 405 line video clock. This means you don't have to get a signal between async clock domains.
Generate the carrier frequency with a DTO.
Interpolate the 405 video up to the HF clock rate
Multiply the video by the carrier
Send the result to the DAC
None of this is too hard, except that as you push to much over 100MHz the FPGA will start to complain. Then you'll be using all the tricks in the book to get the relevant parts to work fast enough. Been there, done that., it's not pretty. Newer, faster FPGAs will be better. To give you an idea of improvements over the years, when I first used FPGAs in the early 1990s I was wary of running at 27MHz and so used pairs of 13.5MHz video streams. This may have been overcautious and made me use more or bigger devices but it made life easy. With Xilinx Spartan 3 series FPGAs (as used in Aurora, Frank's Altera in the Hedghog is of similar vintage) I've found that 54MHz is utterly uncritical, 74.25MHz is very easy but 148.5MHz needs great care. Any higher would get horrible, except perhaps for small amounts of logic.
The sound modulator is in some ways more of a nuisance. You'll need an audio ADC, driven by a clock that's an integer fraction of the HF clock. Then it's much the same as video. The DAC may or may not be sufficiently linear to convert video and audio without bad sound on vision or vision on sound. If not, then you need a 2nd DAC for audio.
Use a high frequency clock that's a multiple of the 405 line video clock. This means you don't have to get a signal between async clock domains.
Generate the carrier frequency with a DTO.
Interpolate the 405 video up to the HF clock rate
Multiply the video by the carrier
Send the result to the DAC
None of this is too hard, except that as you push to much over 100MHz the FPGA will start to complain. Then you'll be using all the tricks in the book to get the relevant parts to work fast enough. Been there, done that., it's not pretty. Newer, faster FPGAs will be better. To give you an idea of improvements over the years, when I first used FPGAs in the early 1990s I was wary of running at 27MHz and so used pairs of 13.5MHz video streams. This may have been overcautious and made me use more or bigger devices but it made life easy. With Xilinx Spartan 3 series FPGAs (as used in Aurora, Frank's Altera in the Hedghog is of similar vintage) I've found that 54MHz is utterly uncritical, 74.25MHz is very easy but 148.5MHz needs great care. Any higher would get horrible, except perhaps for small amounts of logic.
The sound modulator is in some ways more of a nuisance. You'll need an audio ADC, driven by a clock that's an integer fraction of the HF clock. Then it's much the same as video. The DAC may or may not be sufficiently linear to convert video and audio without bad sound on vision or vision on sound. If not, then you need a 2nd DAC for audio.
www.borinsky.co.uk Jeffrey Borinsky www.becg.tv
